RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 328
RCLXT16706FE
Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet
1.RCLXT16706FE.pdf
(352 pages)
Specifications of RCLXT16706FE
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
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Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
328
Operating Current I/O
Outputs loaded
NOTES:
1. The UTOPIA interface uses the TTL values.
2. Applies to pins when configured as inputs
3. Applies to pins when tristated
4. VDD_CORE = 2.75V; VDD_TTL = VDD_PECL = 3.63
Table 34. DC Electrical Characteristics (Sheet 3 of 3)
Figure 78. Receive 16-bit Differential PECL Line Side Interface Timings
RPCI_P/N
RPDI_P/N[15:0]
RFPI_P/N
RPRTY_P/N
Note: Minimum and maximum timing values are guaranteed by design and other correlation methods and
Note: All timing parameters assume that the LVTTL outputs for the POS-UTOPIA/UTOPIA interface
Parameter
only a small subset of them are subject to production testing.
have a 25 pF load (as per the ATM forum specification) and the rest of the LVTTL outputs have a
50 pF load unless otherwise noted. The minimum and maximum test load is 50 pF.
Pol_RPCI_P = 0 (register ICPCNF2)
t
pRDsu
VALID DATA
Symbol
I
I
I
DDIO_1
DDIO_2
DDIO_3
t
pRDh
VALID DATA
Min
-
-
-
Typ
(See Note 4)
(See Note 4)
(See Note 4)
Max
773
206
73
Pol_RPCI_P = 1 (register ICPCNF2)
t
pRDsu
VALID DATA
Units
mA
mA
mA
t
pRDh
Single OC-48c ATM/
POS
16-bit PECL line and
32-bit UTOPIA @ 104
MHz
50Ω PECL Line
Termination to
VDD_PECL-2V
Quad OC-12c ATM/
POS
4 x 8-bit TTL line and
32-bit UTOPIA @ 104
MHz
Single OC-12c ATM/
POS
8-bit TTL line and 16-bit
UTOPIA @ 50 MHz
Test Conditions
VALID DATA
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