RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 323

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

11.14.3
11.14.4
Datasheet
31:27
31:29
26:0
28:0
Bit
Bit
Table 30. HDLC Flow Control Using XmtIPGAbsEn = '1' and XmtIPGAbsCnf = '0'
Table 31. HDLC Flow Control Using XmtIPGAbsEn = '1' and XmtIPGAbsCnf = '1'
Unused
XmtFrmCnt[26:0]
Unused
XmtByteCnt[28:0]
T_FRMCNT—Transmit Frame Counter ((1cc)43H-(1cc)42H)
(1cc)43H = Bits[26:16], (1cc)42H = Bits[15:0]
T_BYTECNT—Transmit Byte Counter ((1cc)45H-(1cc)44H)
(1cc)45H = Bits[31:16], (1cc)44H = Bits[15:0]
XmtIPGAbs[7:0]
Number of FLAGs
XmtIPGAbs[7:0]
Number of FLAGs
Name
Name
XmtIPGAbs[7:0] multiplied by 256. If XmtIPGAbs[7:0] are set to 00H, the HDLC controller
inserts 65536 Flag characters between consecutive frames.
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
XmtFrmCnt[26:0] counts the number of packets read from
the transmit FIFO and transmitted into HDLC frames during
the last accumulation interval. XmtFrmCnt[26:0] does not
count the aborted HDLC frames.
A write to the counter (address (1cc)43H) causes the entire
counter to be loaded into a buffer and then cleared. The
contents of the buffer can then be read.
XmtByteCnt[28:0] counts the number of bytes read from the
transmit FIFO and inserted into the transmitted HDLC
frames during the last accumulation interval.
A write to the counter (address (1cc)45H) causes the entire
counter to be loaded into a buffer and then cleared. The
contents of the buffer can then be read.
65536
256
0
0
Description
Description
256
1
1
1
512
2
2
2
768
3
3
3
1024
4
4
4
Type
Type
R
R
…
…
…
…
Default
Default
00H
00H
65280
255
255
255
323