RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 29
RCLXT16706FE
Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet
1.RCLXT16706FE.pdf
(352 pages)
Specifications of RCLXT16706FE
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
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Table 4.
Pin Description (Sheet 15 of 66)
TPCO_0
TPCO_1
TPCO_2
TPCO_3
TFPI
TFPO
NOTE: See notes 1, 2, and
Pin Name
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
AH3
AC3
AB2
AG6
AH5
AF2
Pin
LVTTL
Output
12 mA
LVTTL
Input
LVTTL
Output
12 mA
Type
3
at the end of the table.
Transmit Parallel Clock Output TTL. TPCO_i (i = 0, 1, 2, 3) is a flow-
through or divided version of TPCI_i or RPCI_i. XmtCOCnf (register
T_COCNF) configures the TPCO_i (i = 0, 1, 2, 3) outputs as a 77.76
MHz/38.88 MHz/19.44 MHz/8-KHz clock.
When Intel IXF6048 is configured as a single STS-12/STM-4/STS-3
(non-concatenated or concatenated) transceiver, TPCO_1, TPCO_2,
and TPCO_3 are tristated
XmtTimRef (register T_COCNF) configures the transmitter in two
different modes:
NOTE: In the line loopback mode of operation, the TPCO_i clocks are
Transmit Frame Position Input TTL. TFPI is the active-high frame
position input. TFPI can only be used when the four transmit channels
use the common clock input (TPCI_0). TFPI is used to align the SONET/
SDH frames generated by the four transmit channels to an external 8-
KHz system reference.
The byte position indicated by TFPI is selected by configuring
XmtFPICnf[7:0] (global register T_FPCNF). TFPI should be active-high
for a single TPCI_0 period.
TFPI is sampled on the rising edge of TPCI_0.
If it is not required that the frames are aligned to an external source,
TFPI have to be tied to GND
Transmit Frame Position Output TTL. TFPO is an active-high frame
position output. TFPO is an active-high pulse indicating the position of
the SONET/SDH frame on the TPDO_0[7:0].
The byte position indicated by TFPO is selected by configuring
XmtFPOCnf[7:0] (global register T_FPCNF). TFPO is active-high for a
single TPCI_0 period.
TFPO is updated on the rising edge of TPCI_0.
• Clocked by the transmit parallel clock input TPCI_i (XmtTimRef =
• Clocked by the receive parallel clock input RPCI_i (XmtTimRef =
'10')
'01')
derived from the RPCI_i clock input, because the transmitter's
internal clock source is automatically switched to the RPCI_i
clock input in that case.
Description
29
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