RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 185

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

7.1
Datasheet
Figure 54. HDLC Frame Mapping
Figure 55. HDLC Frame Format
(1-byte)
FLAG
(7EH)
Address
Receive HDLC Frame Processing
When Intel IXF6048 is configured as a Quad transceiver (STS-1/STS-3c/STM-1/STS-12c/STM-
4c) or as a Single OC-48/STM-16/STM-4 (non-concatenated) transceiver, each of the four receive
HDLC controllers extracts the incoming HDLC frames from the corresponding SPE, and writes the
POS-packets into a FIFO memory. The FIFO memory is 16-Kbyte deep in the first channel and 2-
Kbyte deep in the other three channels. When Intel IXF6048 is configured as a Single OC-48c/
STM-12c (concatenated) transceiver, only one HDLC controller is active, extracting the incoming
HDLC frames from the SPE and writing the POS-packets into a 16-Kbyte deep FIFO memory.
(1-byte)
Control Protocol
(1-byte) (1 or 2-byte)
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
POS-packet (format 2)
MSOH
RSOH
X
POS-packet (format 1)
P
O
H
Information
(IP packet)
PPP frame
HDLC
frame
HDLC frame
HDLC frame
.....
.....
HDLC
frame
Padding
HDLC frame
HDLC
frame
HDLC frame
HDLC
frame
(2 or 4-byte) (1-byte)
HDLC frame
FCS
HDLC
frame
HDLC frame
FLAG
(7EH)
HDLC
frame
Interframe
(FLAGs)
Address
or next
filling
185