RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 246
RCLXT16706FE
Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet
1.RCLXT16706FE.pdf
(352 pages)
Specifications of RCLXT16706FE
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
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Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
246
Bit
6
5
4
RcvFifEmptEOF
RcvDirStatCnf
RcvMPhyDevCnf
Name
RcvFifEmptEOF configures the assertion condition of RXFA_i (i =
0, 1, 2, 3) in POS mode:
'0' = RXFA_i is asserted if the FIFO contains one or more EOFs or
if the FIFO contains a number of words equal to or greater than the
receive programmable watermark (register R_PWM).
'1' = RXFA_i is asserted if the FIFO contains a number of words
equal to or greater than the receive programmable watermark
(register R_PWM).
RcvDirStatCnf use the RXFA_i (i = 0, 1, 2, 3) outputs in two
different ways:
'1' = Direct status indication mode. The RXFA_i (i = 0, 1, 2, 3)
outputs are always driven.
'0' = Multiplexed status polling. The RXFA_i (i = 0, 1, 2, 3) outputs
are driven only after one (UTOPIA Level 2) or two (UTOPIA Level
3) clock cycles with an address in the RXADDR bus matching the
programmed base-address value UaddrBase[2:0].
RcvMPhyDevCnf configures the receive interface as follows:
'1' = The receive used outputs are only driven when the device is
selected for a receive cell transfer. RXPFA is only driven when
RXADDR matches the programmed device address. This setting
must be used when Intel IXF6048 shares the receive interface with
other PHY devices.
'0' = The receive outputs RXDATA, RXSOF, RXPRTY, and RXFA
are always driven. This setting can be used when Intel IXF6048 is
the only PHY device in the receive interface.
Description
Type
R/W
R/W
R/W
Datasheet
Default
'0'
'1'
'0'
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