RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 108

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
4.3
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Finally, the data is scrambled and then framing bytes A1/A2, section trace byte J0, and Z0 bytes,
are added.
For OC-1/3, each data stream is then either serialized and output on the TSDO_P/Ni pin
synchronous with the TSCO_P/Ni clock or output on the byte parallel bus TPDO_i[7:0]. For OC-
12, the data stream is output on the byte parallel output bus TPDO_i[7:0] with the TPCO_i clock.
For OC-48 application, data is output on the 8/16-bit parallel bus TPDO_P/N[15:0] with the
TPCO_P/N clock or on the 32-bit parallel bus TPDO[31:0].
Receive Data Flow
OC-1/3 data is input on the RSDI_P/Ni pin or RPDI_i[7:0]. The serial clock input is RSCI_P/Ni,
and the parallel clock is RPCI_i.
OC-12 data is input on the parallel 8-bit RPDI_i[7:0] input bus (parallel interface). OC-48 data is
input either on the parallel 8/16-bit RPDI_P/N[15:0] or the parallel 32-bit RPDI[31:0] input bus.
First, the interface block detects Loss Of Signal alarm condition based on data transition or all '0's
in the incoming stream.
The input data is then fed to the framing and descrambling block (Receive Frame Acquisition
block). The framing block synchronizes the timing generator to the incoming data and provides
Out Of Frame and Loss Of Frame alarm signals. These alarms are based on frame counts that are
programmed via the microprocessor interface, as the ITU specifications are unclear at this time.
After frame synchronization and descrambling, the Receive Regenerator Section termination
Processor (RRSP) extracts the RSOH:
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TOWC and an 8-KHz sync pulse at TOWBYC. In repeater mode, this byte can also be passed
through unchanged.
F1 may be sourced from the TDOW dedicated serial input, if so configured, or the TSOH
serial bus input. In the case of a dedicated serial port, a 64-KHz reference clock is supplied at
TOWC and an 8-KHz sync pulse at TOWBYC. In repeater mode, this byte can also be passed
through unchanged.
Z0/NU (1
They may also be sourced from the TSOH input. In repeater mode, these byte can also be
passed through, unchanged.
The B1 byte is calculated internally (after scrambling) and inserted (before scrambling). The
microprocessor can invert the values of B1 for system testing purposes.
The other RSOH bytes are unused. They can be passed through unchanged in repeater mode,
their value can be set to the default (all '0's), or they can be sourced from the TSOH input.
The expected value of the J0 string is stored via the microprocessor interface (Section Trace
Buffer). The received J0 string is checked for stability, compared with the stored version, and
in the case of a 16-byte trace message, used to calculate a CRC-7 byte. Three alarms can be
generated: a J0 (Trace ID) Unstable alarm, a J0 Mismatch alarm, and J0 CRC-7 Error alarm.
The accepted receive J0 trace is accessible and can be read by the microprocessor interface.
Receive J0 byte is also provided at RSOH output.
B1 byte is calculated internally and compared to the incoming B1 value. The errors are stored
into a set of counters that can be read by the microprocessor interface, and provided serially at
RSAL Section Alarm bus output pin.
st
row) bytes may be set to all '0's, all '1's, xAAH, or a previous STS-1 ID definition.
Datasheet