RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 121

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
Equation 1. BER = V / ((SZ + 1) ⋅ N ⋅ 51264)
Where V is the number-of-B2-errors register field value for setting or clearing; SZ is the window-
size-component register field value for setting or clearing and is used to derive the number of
®
frames in a window; and N is the STS line rate. See the Intel
Framer B2 Error Threshold
Calculation (EED/DSD) Application Note (order number 273717) for more details on BER
threshold setting.
4.4.1.4.2 K1 and K2 Bytes: Automatic Protection Switching Channel
These bytes are assigned for the APS signaling. A change in K1 byte for three consecutive frames
is indicated in register IS_MUX (RcvK1Chg bit) and allows the updating of register R_K2K1 (8
LSB bits). A change in K2 byte for three consecutive frames is indicated in register IS_MUX
(RcvK2Chg bit) and allows the updating of register R_K2K1 (8 MSB bits). Register R_K2K1
provides so microprocessor access to both K1 and K2 received filtered values. When the value of
K1 byte has not been detected identical for 3 consecutive frames in a window of 16 frames, a
RcvK1Unstable alarm is indicated in register IS_MUX. When the value of K2 byte has not been
detected identical for 3 consecutive frames in a window of 16 frames, a RcvK2Unstable alarm is
indicated in register IS_MUX.
It is possible to configure the K1/K2 process as for a single channel (see configuration register
R_MST_C). In this mode, a change in K1/K2 bytes for three consecutive frames is indicated in
register IS_MUX and allows the updating of register R_K2K1, providing K1/K2 received APS
filtered value.
The K1 and K2 received filtered values (APS channel), the indications of K1 and K2 change, and
the K1 and K2 Unstable alarms are provided serially at the Receive Section Alarm bus output,
RSAL.
The K1 and K2 receive bytes are provided serially at RSOH serial bus output.
4.4.1.4.3 MS-RDI Via K2 Byte (Generation and Detection)
The Multiplex Section Remote Defect Indication (MS-RDI) is used to tell the transmit end that the
received end has detected an incoming section defect or is receiving MS-AIS. The MS-RDI
generated defect is internally looped to the transmitter and provided serially at the Receive Section
Alarm bus output, RSAL.
An MS-RDI is detected when the three received K2[2:0] bits have a value of '110' for three, five,
ten, or 16 consecutive frames (configurable via register R_MST_C). MS-RDI detector status
changes are indicated in register IS_MUX. The detected MS-RDI defect is provided serially at the
Receive Section Alarm bus output, RSAL.
4.4.1.4.4 MS-AIS Via K2 Byte (Detection)
The Multiplex Section AIS is detected when the three received K2[2:0] bits have a value of '111'
for three or five (configurable via register R_MST_C) consecutive frames. MS-AIS detector status
changes are indicated in register IS_MUX. The detected MS-AIS defect is provided serially at the
Receive Section Alarm bus output, RSAL.
Datasheet
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