RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 93

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

2.0
2.1
2.1.1
Datasheet
Main Features
General
SONET/SDH Receiver Block
•
•
•
•
•
•
•
•
•
•
•
Intel IXF6048 maps/demaps both ATM cells or byte-synchronous HDLC frames (packet over
SONET mode) over SONET/SDH.
The device processes the following SONET/SDH frame formats:
Each channel can be configured fully independently.
Two different system interfaces:
16-bit Intel or Motorola* microprocessor interface.
Programmable in repeater or demultiplexer mode.
Byte alignment (serial or parallel interface), frame acquisition, descrambling, and Section
Overhead extraction of one STS-48c/48/12/3 or four STS-12c/3c/1 data streams. Byte
alignment and/or descrambling may be disabled via microprocessor configuration.
Received payload pointer (H1, H2 bytes) interpreter, path overhead extraction, and payload
bytes demultiplexing.
Loss Of Signal (LOS), Out Of Frame (OOF), Loss Of Frame (LOF), Regenerator Section
Trace Identifier Mismatch (RS-TIM), Excessive Error Defect (EED: fully programmable BER
alarm), Degraded Signal Defect (DSD: fully programmable BER alarm), Multiplexer Section
Alarm Indication Signal (MS-AIS), Multiplexer Section Remote Defect Indication (MS-RDI),
Loss Of Pointer (LOP), Loss Of Pointer Concatenation indication (LOPC), Administrative
Unit alarm indication signal (AU-AIS), Path Unequipped (UNEQ), Path Signal Label
Mismatch (SLM), path alarm indication Signal (VC-AIS), Path Trace Identifier Mismatch
(HP-TIM), Path Remote Defect Identification (enhanced or not HP-RDI) alarms detection on
an incoming STS/STM stream.
Signal Fail (SF) and Signal Degrade (SD) alarm automatic generation.
Automatic or via microprocessor insertion of Alarm Identification Signal at the different
layers (regenerator, multiplexer, adaptation, and path).
— Single STS-48c/STM-16c
— Single STS-48/STM-16
— Single STS-12/STM-4
— Single STS-3
— Quad STS-12c/STM-4c
— Quad STS-3c/STM-1
— Quad STS-1/STM-0
— ATM-UTOPIA Level 3/2/1
— POS-UTOPIA Level 3/2/1
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
93