RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 71

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Datasheet
Table 4.
Pin Description (Sheet 57 of 66)
TXSOF_0
TXSOF_1
TXSOF_2
TXSOF_3
TXEOF_0
TXEOF_1
TXEOF_2
TXEOF_3
TXPRTY_0
TXPRTY_1
TXPRTY_2
TXPRTY_3
TXERR_0
TXERR_1
TXERR_2
TXERR_3
TXPADL_0
TXPADL_1
TXPADL_2
TXPADL_3
NOTE: See notes 1, 2, and
Pin Name
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
Pin
M6
G2
G5
K5
H6
C2
H1
F6
H4
D1
E6
K4
E3
C4
A7
C7
C8
B7
J2
J5
LVTTL
Input
LVTTL
Input
LVTTL
Input
LVTTL
Input
LVTTL
Input
Type
3
at the end of the table.
Transmit Start-of-Frame. TXSOF_i (i = 0, 1, 2, 3) marks (active-high)
the first byte of a frame (cell or packet) in TXDATA_i[15:0].
TXSOF_i (i = 0, 1, 2, 3) is sampled on the rising edge of TXCLK_i.
Transmit End-of-Frame. TXEOF_i (i = 0, 1, 2, 3) marks (active-high) the
last byte of a frame (cell or packet) in TXDATA_i[15:0]. TXEOF_i is used
only in POS mode; in ATM mode, TXEOF_i is an unused input.
TXEOF_i (i = 0, 1, 2, 3) is sampled on the rising edge of TXCLK_i.
Transmit Data Parity. TXPRTY (i = 0, 1, 2, 3) indicates the parity of
TXDATA_i[15:0]. Odd or even parity are selectable (see XmtPrtyCnf in
register T_UICHCNF).
TXPRTY_i (i = 0, 1, 2, 3) is sampled on the rising edge of TXCLK_i.
Transmit Packet Error. TXERR_i (i = 0, 1, 2, 3) is an active-high input
allowing the Data Link Layer device to indicate that the current packet
must be aborted (transmitted ending with an Abort sequence). TXERR_i
is used only in POS mode; in ATM mode, TXERR_i is an unused input.
After asserting TXERR_i (i = 0, 1, 2, 3), the next word written into
transmit FIFO #i should be the first word of the next packet (TXSOF_i
asserted). After asserting TXERR_i, the writings to transmit FIFO #i are
ignored until a start-of-frame (TXSOF_i asserted) is detected. When
TXERR_i is asserted, both TXSOF_i and TXEOF_i are ignored.
TXERR_i (i = 0, 1, 2, 3) is sampled on the rising edge of TXCLK_i.
Transmit Padding Length. TXPADL_i (i = 0, 1, 2, 3) indicates the
number of padding bytes included in the last word of the packet
transferred in TXDATA_i[15:0]. TXPADL_i is used only in POS mode; in
ATM-UTOPIA mode TXPADL_i (i = 0, 1, 2, 3) are unused inputs.
Intel IXF6048 only accepts complete words on TXDATA_i[15:0] except in
the last word of a packet. Intel IXF6048 uses TXPADL_i only when
TXEOF_i (i = 0, 1, 2, 3) is asserted (in the last word of a packet).
When configured in 16-bit mode, the last word may contain zero or one
padding byte. In 8-bit mode, TXPADL_i (i = 0, 1, 2, 3) is not used.
TXPADL_i, i = 0, 1, 2, 3 (16-Bit Mode)
'0' = packet ends on TXDATA[7:0] (TXDATA = DD)
'1' = packet ends on TXDATA[15:8] (TXDATA = DP)
NOTE: D = valid data byte, P = padding byte
TXPADL_i (i = 0, 1, 2, 3) is sampled on the rising edge of TXCLK_i.
Description
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