RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 133

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Datasheet
Table 15. K2 RDI Bit Coding
The K2-APS source is specified by register T_SC_MSOH, combined with input serial bus control
pin TSOHINS, as coming from:
The K2-MS-RDI source is specified by register T_SC_MSOH, combined with input serial bus
control pin TSOHINS, as coming from:
When MS-RDI is inserted in the transmit frame, following a defect detected in the receiver, it
remains active for at least ‘N’ consecutive frames. This number of frames is configurable via
register T_SC_MSOH with ‘N’ being 20, 10, 5, or 1.
4.4.2.3.3 S1 Byte: Synchronization Status
The S1[3:0] bits are allocated for Synchronization Status Messages. The S1 source is specified by
register T_SC_MSOH, combined with input serial bus control pin TSOHINS, as coming from:
NOTES:
1. The Excessive Error Defect trigger can be disabled via register R_MST_C.
2. It is possible to force insertion of RDI by configuring register R_MST_C.
K2[2:0] RDI Bits Coding
— An internal register (register MP_TK2K1) programmed by the microprocessor (default
— The serial TSOH interface (TSOH input pin).
— The serial Transmit Section Alarm port (TSAL input pin).
— The incoming byte from the downstream data—when all internally Processed MSOH
— An internal register (MP_TK2K1) programmed by the microprocessor (default setting).
— The serial TSOH interface (TSOH input pin, in which case the K2-APS bits are also
— The serial Transmit Section Alarm port (TSAL input pin).
— The incoming byte from the downstream data—when all internally Processed MSOH
— An internal register (register MP_TK2K1) programmed by the microprocessor, in which
— A microprocessor force command (register R_MST_C). The K2[2:0] RDI bits take a
— Receiver section defect. Automatic insertion of the RDI output from the receiver,
— TSAL input alarm bus. The K2[2:0] RDI bits take the value of K2-APS.
— Register MP_TK2K1. The K2[2:0] RDI bits take the value of K2-APS.
setting).
(B2, K1, K2, S1 and M1) bytes are configured in pass-through mode.
updated from the TSOH input).
(B2, K1, K2, S1 and M1) bytes are configured in pass-through mode, in which case, the
K2-APS bits are also updated from the same source.
case the K2-APS bits are also updated from register MP_TK2K1.
value of '110', see
internally looped back. The K2[2:0] RDI bits take a value of '110', see
'000'
'110'
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
Table
No Remote Defect
Remote Defect
15.
Meaning
No Remote Defect
MS-AIS, EED
Microprocessor
Triggered by
1
2
Table
15.
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