RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 341

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

RXVAL_i, RXSOF_i, RXFA_i
Datasheet
RXCLK rising edge to low-impedance RXDATA[63:0], RXPRTY,
RXSOF, RXEOF, RXPADL[2:0], RXVAL, RXERR, RXPFA, and
RXFA_i (i = 0, 1, 2, 3)
RXCLK rising edge to high-impedance RXDATA[63:0], RXPRTY,
RXSOF, RXEOF, RXPADL[2:0], RXVAL, RXERR, RXPFA, and
RXFA_i (i = 0, 1, 2, 3)
RXCLK rising edge to high-impedance RXDATA[63:32]
NOTES:
TXCLK frequency
TXCLK duty cycle
TXDATA[63:0], TXADDR[4:0], TXPADL[2:0], TXENB, TXSOF, TXEOF,
TXPRTY, and TXERR setup time to TXCLK
TXDATA[63:0], TXADDR[4:0], TXPADL[2:0], TXENB, TXSOF, TXEOF,
TXPRTY, and TXERR hold time from TXCLK
TXCLK rising edge to TXPFA, TXSFA, and TXFA_i (i = 0, 1, 2, 3)
propagation delay
TXCLK rising edge to low-impedance TXPFA, TXSFA, and TXFA_i (i =
0, 1, 2, 3)
TXCLK rising edge to high-impedance TXPFA, TXSFA, and TXFA_i (i
= 0, 1, 2, 3)
NOTES:
1. In memory mapped mode (RcvSelMode = 1 in register R_UICNF), t
2. Note that in 64-bit mode t
1. In memory mapped mode (XmtSelMode = 1 in register T_UICNF), t
Table 48. Receive UTOPIA Single Interface Timings for the Configurations Supporting 50 MHz
Table 49. Transmit UTOPIA Single Interface Timings for the Configurations Supporting 50
Figure 93. Receive UTOPIA Quad Interface Configured for 50 MHz Operation: 16/8-Bit Data
RXPADL_i, RXPRTY_i,
RXEOF_i, RXERR_i,
RXDATA_i[15:0],
Operation: 64/32/16/8-Bit Wide Data Bus, One Decode-Response Clock Cycles or
High-Impedance Outputs (Sheet 2 of 2)
MHz Operation: 64/32/16/8-Bit Wide Data Bus, One Decode-Response Clock Cycles
or High-Impedance Outputs
Bus and One/Two Clock Cycle Decode-Response Delay
RXENB_i
RXCLK_i
ul2Rxpd
Parameter
Parameter
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
is different for RXDATA[63:32]
VALID OUTPUT
t
ul2Rxsu
VALID INPUT
t
ul2Rxpd
t
2
ul2Rxh
1/f
VALID OUTPUT
ul2Rx
ul2Rxsu
ul2Txsu
VALID INPUT
Symbol
Symbol
t
t
t
t
t
t
t
ul2RxhlZ
ul2RxlhZ
ul2RxlhZ
ul2TxhlZ
ul2TxlhZ
D
t
ul2Txsu
ul2Txpd
f
ul2Txh
= 5 ns, otherwise t
ul2Tx
= 5 ns, otherwise t
ul2Tx
t
ul2RxlhZ
4/5
Min
Min
30
1
1
1
1
1
ul2Txsu
ul2Rxsu
VALID INPUT
Typ
= 4 ns
Typ
= 4 ns
t
ul2RxhlZ
Max
Max
50
70
14
11
11
6
VALID OUTPUT
Unit
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
%
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