R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 337

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

9.4
9.4.1
Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of
free-running operation, periodic counting, and external event counting.
Each TGR can be used as an input capture register or output compare register.
(1)
When one of bits CST0 to CST5 is set to 1 in TSTR, the TCNT counter for the corresponding
channel starts counting. TCNT can operate as a free-running counter, periodic counter, and so on.
(a)
Figure 9.3 shows an example of the count operation setting procedure.
Counter Operation
Example of count operation setting procedure
Operation
Basic Functions
Select output compare register
Select counter clearing source
Select counter clock
Operation selection
<Periodic counter>
Periodic counter
Figure 9.3 Example of Counter Operation Setting Procedure
Start count
Set period
[1]
[2]
[3]
[4]
[5]
<Free-running counter>
Free-running counter
Start count
Rev. 3.00 Mar. 14, 2006 Page 299 of 804
Section 9 16-Bit Timer Pulse Unit (TPU)
[5]
[1]
[2]
[3]
[4]
[5]
Select the counter
clock with bits
TPSC2 to TPSC0 in
TCR. At the same
time, select the
input clock edge
with bits CKEG1
and CKEG0 in TCR.
For periodic counter
operation, select the
TGR to be used as
the TCNT clearing
source with bits
CCLR2 to CCLR0 in
TCR.
Designate the TGR
selected in [2] as an
output compare
register by means of
TIOR.
Set the periodic
counter cycle in the
TGR selected in [2].
Set the CST bit in
TSTR to 1 to start
the counter
operation.
REJ09B0104-0300