R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 701
R5F61525
Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5F61525.pdf
(846 pages)
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Bit
13
12, 11
10
9
8
7
Bit Name
POSEL1
ICK2
ICK1
ICK0
Initial
Value
0
All 0
0
1
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
B φ Output Select 1
Controls the B φ output on PA7.
0: External clock (Bφ)
1: Setting prohibited
Reserved
These bits are always read as 0. The write value should
always be 0.
System Clock (Iφ) Select
These bits select the frequency of the system clock
provided to the CPU and DMAC. The ratio to the input
clock is as follows:
000: ×8
001: ×4
010: ×2
011: ×1
1XX: Setting prohibited
The frequency of the peripheral module clock changes to
the same frequency as the system clock if the frequency
of the system clock is lower than that of the peripheral
module clock.
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 3.00 Mar. 14, 2006 Page 663 of 804
Section 18 Clock Pulse Generator
REJ09B0104-0300
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