R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 590

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 15 A/D Converter
15.3.1
There are eight 16-bit read-only ADDR registers, ADDRA to ADDRH, used to store the results of
A/D conversion. The ADDR registers, which store a conversion result for each channel, are shown
in table 15.2.
The converted 10-bit data is stored in bits 15 to 6. The lower 6-bit data is always read as 0.
The data bus between the CPU and the A/D converter has a 16-bit width. The data can be read
directly from the CPU. ADDR must not be accessed in 8-bit units and must be accessed in 16-bit
units.
Table 15.2 Analog Input Channels and Corresponding ADDR Registers
Rev. 3.00 Mar. 14, 2006 Page 552 of 804
REJ09B0104-0300
Analog Input Channel
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Bit
Bit Name
Initial Value
R/W
A/D Data Registers A to H (ADDRA to ADDRH)
15
R
0
14
R
0
13
R
0
12
R
0
11
R
0
10
R
0
A/D Data Register Which Stores Conversion Result
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH
R
9
0
R
8
0
R
7
0
R
6
0
R
5
0
R
4
0
R
3
0
R
2
0
R
1
0
R
0
0

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