R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 412

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 11 Watchdog Timer (WDT)
11.5
11.5.1
The watchdog timer’s TCNT, TCSR, and RSTCSR registers differ from other registers in being
more difficult to write to. The procedures for writing to and reading these registers are given
below.
(1)
TCNT and TCSR must be written to by a word transfer instruction. They cannot be written to by a
byte transfer instruction.
For writing, TCNT and TCSR are assigned to the same address. Accordingly, perform data
transfer as shown in figure 11.4. The transfer instruction writes the lower byte data to TCNT or
TCSR.
To write to RSTCSR, execute a word transfer instruction for address H'FFA6. A byte transfer
instruction cannot be used to write to RSTCSR.
The method of writing 0 to the WOVF bit in RSTCSR differs from that of writing to the RSTE bit
in RSTCSR. Perform data transfer as shown in figure 11.4.
At data transfer, the transfer instruction clears the WOVF bit to 0, but has no effect on the RSTE
bit. To write to the RSTE bit, perform data transfer as shown in figure 11.4. In this case, the
transfer instruction writes the value in bit 6 of the lower byte to the RSTE bit, but has no effect on
the WOVF bit.
Rev. 3.00 Mar. 14, 2006 Page 374 of 804
REJ09B0104-0300
Writing to TCNT, TCSR, and RSTCSR
Usage Notes
Notes on Register Access
TCSR write:
Writing 0 to the WOVF bit in RSTCSR:
TCNT write or writing to the RSTE bit in RSTCSR:
Address: H'FFA4 (TCNT)
Address: H'FFA4 (TCSR)
Address: H'FFA6 (RSTCSR)
Figure 11.4 Writing to TCNT, TCSR, and RSTCSR
H'FFA6 (RSTCSR)
15
15
15
H'5A
H'A5
H'A5
8 7
8 7
8 7
Write data
Write data
H'00
0
0
0

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