R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 544

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Controller Area Network (HCAN)
13.8.9
1. When the transmit wait cancel register (TXCR) is used to cancel a transmit wait message in a
• The HRxD pin is stacked to 1 because of a CAN bus error, etc.
• There is at least one mailbox waiting for transmission or being transmitted.
• The message transmission in a mailbox being transmitted is canceled by TXCR.
• Transmission must not be canceled by TXCR. When transmission is normally completed after
• To cancel transmission, the corresponding bit to TXCR must be written to 1 continuously until
2. When the bus-off state is entered while TXPR is set and the transmit wait state is entered, the
• A transmit wait message must be cleared by resetting the HCAN during the bus-off period.
Rev. 3.00 Mar. 14, 2006 Page 506 of 804
REJ09B0104-0300
If this occurs, transmission is canceled. However, since TXPR and TXCR states are indicated
wrongly that a message is being cancelled, transmission cannot be restarted even if the stack
state of the HRxD pin is canceled and the CAN bus recovers the normal state. If there are at
least two transmission messages, a message which is not being transmitted is canceled and a
message being transmitted retains its state.
To avoid this, one of the following countermeasures must be executed.
the CAN bus has recovered, TXPR is cleared and the HCAN recovers the normal state.
the bit becomes 0. TXPR and TXCR are cleared and the HCAN recovers the normal state.
internal state machine does not operate even if TXCR is set during the bus-off state. Therefore
transmission cannot be canceled. The message can be canceled when one message is
transmitted or a transmission error occurs after the bus-off state is recovered. To clear a
message after the bus-off state is recovered, the following countermeasure must be executed.
To reset the HCAN, the module stop bit (MSTPC11 in MSTPCRC) must be set or cleared. In
this case, the HCAN is entirely reset. Therefore the initial settings must be made again.
transmit wait mailbox, the corresponding bit to TXCR and the transmit wait register (TXPR)
may not be cleared even if transmission is canceled. This occurs when the following
conditions are all satisfied.
HCAN TXCR Operation