R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 506

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Controller Area Network (HCAN)
Rev. 3.00 Mar. 14, 2006 Page 468 of 804
REJ09B0104-0300
Bit
8
7 to 5
4
Bit Name
IRR0

IRR12
Initial
Value
1
All 0
0
R/W
R/(W)*

R/(W)*
Description
Reset Interrupt Flag
Status flag indicating that the HCAN module has
been reset. This bit cannot be masked by the
interrupt mask register (IMR). If this bit is not
cleared to 0 after entering power-on reset or
returning from software standby mode, interrupt
processing will start immediately when the
interrupt controller enables interrupts.
[Setting condition]
When the reset operation has finished after
entering power-on reset or software standby
mode
[Clearing condition]
Writing 1
(When the CPU is used to clear this flag by
writing 1 while the corresponding interrupt is
enabled, be sure to read the flag after writing 1 to
it.)
Reserved
These bits are always read as 0. The write value
should always be 0.
Bus Operation Interrupt Flag
Status flag indicating detection of a dominant bit
due to bus operation when the HCAN module is
in HCAN sleep mode.
[Setting condition]
Bus operation (dominant bit) detection in HCAN
sleep mode
[Clearing condition]
Writing 1
(When the CPU is used to clear this flag by
writing 1 while the corresponding interrupt is
enabled, be sure to read the flag after writing 1 to
it.)