R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 58
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R5F61525
Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5F61525.pdf
(846 pages)
- Current page: 58 of 846
- Download datasheet (6Mb)
Section 2 CPU
• Two base registers
• 4-Gbyte address space
• High-speed operation
• Four CPU operating modes
• Power-down modes
Rev. 3.00 Mar. 14, 2006 Page 20 of 804
REJ09B0104-0300
Notes: 1. Advanced mode is only supported as the CPU operating mode of the H8SX/1520
Vector base register
Short address base register
Program: 4 Gbytes
Data:
All frequently-used instructions executed in one or two states
8/16/32-bit register-register add/subtract: 1 state
8 × 8-bit register-register multiply:
16 ÷ 8-bit register-register divide:
16 × 16-bit register-register multiply:
32 ÷ 16-bit register-register divide:
32 × 32-bit register-register multiply:
32 ÷ 32-bit register-register divide:
Normal mode
Middle mode
Advanced mode
Maximum mode
Transition is made by execution of SLEEP instruction
Choice of CPU operating clocks
2. The multiplier and divider are supported by the H8SX/1520 Group.
3. In the H8SX/1520 Group, an instruction is fetched in 32-bit mode.
Group. Normal, middle, and maximum modes are not supported.
4 Gbytes
1 state
10 states
1 state
18 states
5 states
18 states
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