R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 711

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

19.2.1
SBYCR controls software standby mode.
Bit
15
14
13
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit Name
SSBY


Standby Control Register (SBYCR)
SSBY
R/W
R/W
15
0
7
0
Initial
Value
0
1
0
R/W
R/W
14
1
6
0
R/W
R/W
R/W
R/W
R/W
R/W
13
0
5
0
Description
Software Standby
Specifies the transition mode after executing the SLEEP
instruction
0: Shifts to sleep mode after the SLEEP instruction is
1: Shifts to software standby mode after the SLEEP
This bit does not change when clearing the software
standby mode by using external interrupts and shifting to
normal operation. For clearing, write 0 to this bit. When
the WDT is used as the watchdog timer, the setting of this
bit is disabled. In this case, a transition is always made to
sleep mode or all-module-clock-stop mode after the
SLEEP instruction is executed.
Reserved
This bit is always read as 1. The write value should
always be 1.
Reserved
This bit is always read as 0. The write value should
always be 0.
executed
instruction is executed
STS4
R/W
R/W
12
0
4
0
STS3
R/W
R/W
11
1
3
0
Rev. 3.00 Mar. 14, 2006 Page 673 of 804
STS2
R/W
R/W
10
Section 19 Power-Down Modes
1
2
0
STS1
R/W
R/W
9
1
1
0
REJ09B0104-0300
STS0
R/W
R/W
8
1
0
0