R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 829

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Item
17.7.2 Programming/Erasing
Interface Parameters
Table 17.4 Parameters and Target
Modes
17.7.2 Programming/Erasing
Interface Parameters
(b) Programming
•
17.7.2 Programming/Erasing
Interface Parameters
(c) Erasure
•
(6) Flash Erase Block Select
Parameter (FEBS: General
Register ER0 of CPU)
17.8.2 User Program Mode
(1) On-Chip RAM Address Map
when Programming/Erasing is
Executed
Figure 17.10 RAM Map when
Programming/Erasing is Executed
Bit 4
Bit 4
586
590
593
Page Revision (See Manual for Details)
Amended
Amended
Checks the FKEY value (H'5A) before erasure starts,
and returns the result.
Amended
Checks the FKEY value (H'5A) before erasure starts,
and returns the result.
Amended
FEBS specifies the erase block number. Settable
values for the erase block numbers range from 0 to 11
(H'00000000 to H'0000000B). A value of 0 corresponds
to block EB0 and a value of 11 corresponds to block
EB11. An error occurs when a value outside the range
(from 0 to 11) is set.
Amended
Parameter
DPFR
FPFR
FPEFEQ
FMPAR
FMPDR
FEBS
Unusable area during
programming/erasing
Area to be
downloaded
(size: 4 kbytes)
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Rev. 3.00 Mar. 14, 2006 Page 791 of 804
RAM emulation area or
area that can be used
by user
programming program
Area that can be used
Programming/erasing
Initialization program
(Return value: 1 byte)
System use area
erasing program
Initialization +
Initialization +
program entry
(15 bytes)
by user
DPFR
entry
or
FTDAR setting
FTDAR setting + 16 bytes
FTDAR setting + 32 bytes
FTDAR setting + 4 kbytes
H'FFBFFF
REJ09B0104-0300