R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 392
R5F61525
Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5F61525.pdf
(846 pages)
- Current page: 392 of 846
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Section 10 Programmable Pulse Generator (PPG)
10.3.5
PMR selects the pulse output mode of the PPG for each group. If inverted output is selected, a
low-level pulse is output when PODRH is 1 and a high-level pulse is output when PODRH is 0. If
non-overlapping operation is selected, PPG updates its output values at compare match A or B of
the TPU that becomes the output trigger. For details, refer to section 10.4.4, Non-Overlapping
Pulse Output.
Rev. 3.00 Mar. 14, 2006 Page 354 of 804
REJ09B0104-0300
Bit
7
6
5, 4
Bit
Bit Name
Initial Value
R/W
Bit Name
G3INV
G2INV
PPG Output Mode Register (PMR)
G3INV
R/W
7
1
Initial
Value
1
1
All 1
G2INV
R/W
6
1
R/W
R/W
R/W
R/W
R/W
—
5
1
Description
Group 3 Inversion
Selects direct output or inverted output for pulse output
group 3.
0: Inverted output
1: Direct output
Group 2 Inversion
Selects direct output or inverted output for pulse output
group 2.
0: Inverted output
1: Direct output
Reserved
These bits are always read as 1. The write value should
always be 1.
R/W
—
4
1
G3NOV
R/W
3
0
G2NOV
R/W
2
0
R/W
—
1
0
R/W
—
0
0
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