R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 395

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

10.4.2
Figure 10.4 shows a sample procedure for setting up normal pulse output.
TPU setup
PPG setup
TPU setup
Sample Setup Procedure for Normal Pulse Output
Figure 10.4 Setup Procedure for Normal Pulse Output (Example)
Set counting operation
Select interrupt request
Select TGR functions
Set initial output data
Select output trigger
Enable pulse output
Normal PPG output
Compare match?
Set TGRA value
Set next pulse
Set next pulse
Start counter
output data
output data
Yes
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
Section 10 Programmable Pulse Generator (PPG)
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] At each TGIA interrupt, set the next
Set TIOR to make TGRA an output
compare register (with output disabled).
Set the PPG output trigger cycle.
Select the counter clock source with bits
TPSC2 to TPSC0 in TCR. Select the
counter clear source with bits CCLR1 and
CCLR0.
Enable the TGIA interrupt in TIER. The
DMAC can also be set up to transfer data
to NDR.
Set the initial output values in PODR.
Set the bits in NDER for the pins to be
used for pulse output to 1.
Select the TPU compare match event to
be used as the output trigger in PCR.
Set the next pulse output values in NDR.
Set the CST bit in TSTR to 1 to start the
TCNT counter.
output values in NDR.
Rev. 3.00 Mar. 14, 2006 Page 357 of 804
REJ09B0104-0300