R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 554

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 14 Synchronous Serial Communication Unit (SSU)
14.3.2
SSCRL selects operating mode, software reset, and transmit/receive data length.
Rev. 3.00 Mar. 14, 2006 Page 516 of 804
REJ09B0104-0300
Bit
7
6
5
4 to 2
1
0
Bit
Bit Name
Initial Value
R/W
Bit Name
SSUMS
SRES
DATS1
DATS0
SS Control Register L (SSCRL)
R/W
7
0
Initial
Value
0
0
0
All 0
0
0
SSUMS
R/W
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
SRES
R/W
5
0
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Selects transfer mode from SSU mode and clock
synchronous mode.
0: SSU mode
1: Clock synchronous mode
Software Reset
Setting this bit to 1 forcibly resets the SSU internal
sequencer. After that, this bit is automatically cleared.
The ORER, TEND, TDRE, RDRF, and CE bits in SSSR
and the TE and RE bits in SSER are also initialized.
Values of other bits for SSU registers are held.
To stop transfer, set this bit to 1 to reset the SSU
internal sequencer.
Reserved
These bits are always read as 0. The write value should
always be 0.
Transmit/Receive Data Length Select
Select serial data length.
00: 8 bits
01: 16 bits
10: 32 bits
11: Setting prohibited
R/W
4
0
R/W
3
0
R/W
2
0
DATS1
R/W
1
0
DATS0
R/W
0
0

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