DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 1201

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

• Port E Control Register L2 (PECRL2)
Initial value:
Bit
2
1
0
Bit
15
14
13
12
11
R/W:
Bit:
15
R
0
-
Bit Name
PE8MD2
PE8MD1
PE8MD0
Bit Name

PE7MD2
PE7MD1
PE7MD0

MD2
R/W
PE7
14
0
R/W
MD1
PE7
13
0
Initial
Value
0
0
0
Initial
Value
0
0
0
0
0
R/W
MD0
PE7
12
0
11
R
0
-
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R
R/W
MD2
PE6
10
0
R/W
MD1
PE6
9
0
Description
PE8 Mode
Select the function of the
PE8/TIOC3A/SCK2/SSCK/TMS pin. Fixed to TMS
input when using E10A (in ASEMD0 = low).
000: PE8 I/O (port)
001: TIOC3A I/O (MTU2)
010: SCK2 I/O (SCI)
101: SSCK I/O (SSU)
Other than above: Setting prohibited
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
PE7 Mode
Select the function of the
PE7/BS/TIOC2B/UBCTRG/RXD2/SSI pin.
000: PE7 I/O (port)
001: TIOC2B I/O (MTU2)
010: RXD2 input (SCI)
011: BS output (BSC)*
101: SSI I/O (SSU)
111: UBCTRG output (UBC)
Other than above: Setting prohibited
Reserved
This bit is always read as 0. The write value should
always be 0.
R/W
MD0
PE6
8
0
R
7
0
-
Rev. 3.00 May 17, 2007 Page 1143 of 1582
R/W
MD2
PE5
6
0
Section 21 Pin Function Controller (PFC)
R/W
MD1
PE5
5
0
R/W
MD0
PE5
4
0
R
3
0
-
REJ09B0181-0300
R/W
MD2
PE4
2
0
R/W
MD1
PE4
1
0
R/W
MD0
PE4
0
0