DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 341

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Bit
4
3
2
Bit Name
DMMTU4
DMMTU3
DMMTU2
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Enable Burst-Mode DMAC Transfer with TGIA_4
Activation Source
Setting this bit to 1 enables burst-mode DMA transfer
triggered by the TGIA_4 interrupt from MTU2.
0: DMA transfer in burst mode is disabled when TGIA_4
1: DMA transfer in burst mode is enabled when TGIA_4
Note: Clear this bit during DMA transfer in cycle-steal
Enable Burst-Mode DMAC Transfer with TGIA_3
Activation Source
Setting this bit to 1 enables burst-mode DMA transfer
triggered by the TGIA_3 interrupt from MTU2.
0: DMA transfer in burst mode is disabled when TGIA_3
1: DMA transfer in burst mode is enabled when TGIA_3
Note: Clear this bit during DMA transfer in cycle-steal
Enable Burst-Mode DMAC Transfer with TGIA_2
Activation Source
Setting this bit to 1 enables burst-mode DMA transfer
triggered by the TGIA_2 interrupt from MTU2.
0: DMA transfer in burst mode is disabled when TGIA_2
1: DMA transfer in burst mode is enabled when TGIA_2
Note: Clear this bit during DMA transfer in cycle-steal
is the activation source.
is the activation source.
is the activation source.
is the activation source.
is the activation source.
is the activation source.
mode.
mode.
mode.
Rev. 3.00 May 17, 2007 Page 283 of 1582
Section 9 Bus State Controller (BSC)
REJ09B0181-0300