DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 85

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

2.2.3
There are four 32-bit system registers, designated two multiply and accumulate registers (MACH
and MACL), a procedure register (PR), and program counter (PC).
• Multiply and accumulate registers (MACH and MACL)
• Procedure register (PR)
• Program counter (PC)
2.2.4
Table 2.1 lists the initial values of registers after a reset.
Table 2.1
Type of register
General register
Control register
System register
This register stores the results of multiplication and multiply-and-accumulate operation.
This register stores the return-destination address from subroutine procedures.
The PC indicates the point which is four bytes (two instructions) after the current execution
instruction.
System Registers
Initial Values of Registers
Initial Values of Registers
Register
R0 to R14
R15 (SP)
SR
GBR
VBR
MACH, MACL, PR
PC
Default
Undefined
SP value set in the exception handling vector table
I3 to I0: 1111 (H'F)
Reserved bits: 0
Other bits: Undefined
Undefined
H'00000000
Undefined
PC value set in the exception handling vector table
Rev. 3.00 May 17, 2007 Page 27 of 1582
REJ09B0181-0300
Section 2 CPU