DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 1412

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 27 List of Registers
Rev. 3.00 May 17, 2007 Page 1354 of 1582
REJ09B0181-0300
Register Name
I
I
I
I
I
Slave address register
I
I
NF2CYC register
SS control register H
SS control register L
SS mode register
SS enable register
SS status register
SS control register 2
SS transmit data register 0
SS transmit data register 1
SS transmit data register 2
SS transmit data register 3
SS receive data register 0
SS receive data register 1
SS receive data register 2
SS receive data register 3
Compare match timer start register
Compare match timer control/status
register_0
Compare match counter_0
Compare match constant register_0
Compare match timer control/status
register_1
Compare match counter_1
Compare match constant register_1
2
2
2
2
2
2
2
C bus control register 1
C bus control register 2
C bus mode register
C bus interrupt enable register
C bus status register
C bus transmit data register
C bus receive data register
Abbreviation
ICCR1
ICCR2
ICMR
ICIER
ICSR
SAR
ICDRT
ICDRR
NF2CYC
SSCRH
SSCRL
SSMR
SSER
SSSR
SSCR2
SSTDR0
SSTDR1
SSTDR2
SSTDR3
SSRDR0
SSRDR1
SSRDR2
SSRDR3
CMSTR
CMCSR_0
CMCNT_0
CMCOR_0
CMCSR_1
CMCNT_1
CMCOR_1
No. of
Bits
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
16
16
16
16
16
16
16
Address
H'FFFFCD80
H'FFFFCD81
H'FFFFCD82
H'FFFFCD83
H'FFFFCD84
H'FFFFCD85
H'FFFFCD86
H'FFFFCD87
H'FFFFCD88
H'FFFFCD00
H'FFFFCD01
H'FFFFCD02
H'FFFFCD03
H'FFFFCD04
H'FFFFCD05
H'FFFFCD06
H'FFFFCD07
H'FFFFCD08
H'FFFFCD09
H'FFFFCD0A
H'FFFFCD0B
H'FFFFCD0C
H'FFFFCD0D
H'FFFFCE00
H'FFFFCE02
H'FFFFCE04
H'FFFFCE06
H'FFFFCE08
H'FFFFCE0A
H'FFFFCE0C
Module
I
SSU
CMT
2
C2
8, 16
Access
Size
8
8
8
8
8
8
8
8
8
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
No. of Access
States
Pφ reference
B:2
Pφ reference
B:2
W:2
Pφ reference
B:2
W:2
L:4
Connected Bus
Width
8 bits
16 bits
16 bits