DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 544

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
11.3.15 Timer Start Register (TSTR)
TSTR is an 8-bit readable/writable register that selects operation/stoppage of TCNT for channels 0
to 4.
TSTR_5 is an 8-bit readable/writable register that selects operation/stoppage of TCNTU_5,
TCNTV_5, and TCNTW_5 for channel 5.
When setting the operating mode in TMDR or setting the count clock in TCR, first stop the TCNT
counter.
• TSTR
Rev. 3.00 May 17, 2007 Page 486 of 1582
REJ09B0181-0300
Bit
7
6
5 to 3
Bit Name
CST4
CST3
—
Initial value:
Initial
Value
0
0
All 0
R/W:
Bit:
CST4
R/W
7
0
R/W
R/W
R/W
R
CST3
R/W
6
0
Description
Counter Start 4 and 3
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but
the TIOC pin output compare output level is retained. If
TIOR is written to when the CST bit is cleared to 0, the
pin output level will be changed to the set initial output
value.
0: TCNT_4 and TCNT_3 count operation is stopped
1: TCNT_4 and TCNT_3 performs count operation
Reserved
These bits are always read as 0. The write value should
always be 0.
R
5
0
-
R
4
0
-
R
3
0
-
CST2
R/W
2
0
CST1
R/W
1
0
CST0
R/W
0
0