DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 559

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 11.38 TIOC4B Output Level Select Function
11.3.22 Timer Output Level Buffer Register (TOLBR)
TOLBR is an 8-bit readable/writable register that functions as a buffer for TOCR2 and specifies
the PWM output level in complementary PWM mode and reset-synchronized PWM mode.
Bit 0
OLS1P
0
1
Bit
7, 6
5
4
3
2
1
0
Bit Name
—
OLS3N
OLS3P
OLS2N
OLS2P
OLS1N
OLS1P
Initial Output
High level
Low level
Initial value:
Initial
value
All 0
0
0
0
0
0
0
R/W:
Bit:
Active Level
Low level
High level
R
7
0
-
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R
6
0
-
OLS3N OLS3P OLS2N OLS2P OLS1N OLS1P
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Specifies the buffer value to be transferred to the
OLS3N bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS3P bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS2N bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS2P bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS1N bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS1P bit in TOCR2.
R/W
5
0
Up Count
Low level
High level
R/W
Function
4
0
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
R/W
3
0
Rev. 3.00 May 17, 2007 Page 501 of 1582
Compare Match Output
R/W
2
0
R/W
1
0
R/W
0
0
Down Count
Low level
High level
REJ09B0181-0300