DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 738

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 13 Port Output Enable (POE)
Figure 13.1 shows a block diagram of the POE.
Rev. 3.00 May 17, 2007 Page 680 of 1582
REJ09B0181-0300
[Legend]
ICSR1:
ICSR2:
ICSR3:
OCSR1:
OCSR2:
TIOC3BS
TIOC3DS
TIOC4AS
TIOC4CS
TIOC4BS
TIOC4DS
TIOC3D
TIOC4C
TIOC4D
TIOC3B
TIOC4A
TIOC4B
POE3
POE2
POE1
POE0
POE7
POE6
POE5
POE4
POE8
Input level control/status register 1
Input level control/status register 2
Input level control/status register 3
Output level control/status register 1
Output level control/status register 2
Input level detection circuit
Input level detection circuit
Input level detection circuit
Output level comparison circuit
Output level comparison circuit
Output level comparison circuit
Output level comparison circuit
Output level comparison circuit
Output level comparison circuit
detection circuit
sampling circuit
detection circuit
sampling circuit
detection circuit
sampling circuit
Falling edge
Falling edge
Falling edge
Low level
Low level
Low level
Figure 13.1 Block Diagram of POE
SPOER:
POECR1:
POECR2:
Frequency
divider
Pφ
Pφ/8
Pφ/16
Pφ/128
Software port output enable register
Port output enable control register 1
Port output enable control register 2
POECR1,
POECR2
SPOER
High-impedance
request signal for MTU2
high-current pins
High-impedance
request signal for MTU2
channel 0 pins
High-impedance
request signal
for MTU2S
high-current pins
Interrupt
request signal