HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 160

• Manufacturer Part Number: HD64F3048VTF8
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048VTF8

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F3048VX8

Section 6 Bus Controller
Chip select signals (CS
can be selected in ABWCR, ASTCR, WCER, and WCR as shown in table 6.3.
Table 6.3
ABWCR
ABWn
0
1
Note: n = 0 to 7
6.3.2
For each of areas 7 to 0, the H8/3048 Group can output a chip select signal (CS
low to indicate when the area is selected. Figure 6.3 shows the output timing of a CS
to 7).
Output of CS
(DDR) of the corresponding port.
In the expanded modes with on-chip ROM disabled, a reset leaves pin CS
pins CS
DDR bits must be set to 1. In the expanded modes with on-chip ROM enabled, a reset leaves pins
CS
must be set to 1. For details see section 9, I/O Ports.
Rev. 7.00 Sep 21, 2005 page 134 of 878
REJ09B0259-0700
3
to CS
3
to CS
Chip Select Signals
0
CS
CS
CS
ASTCR
ASTn
0
1
0
1
in the input state. To output chip select signals CS
Bus Specifications
3
1
to CS
in the input state. To output chip select signals CS
CS
CS
CS
0
WCER
WCEn
—
0
1
—
0
1
: Output of CS
7
to CS
0
) can be output for areas 7 to 0. The bus specifications for each area
WMS1
—
—
0
1
—
—
0
1
3
to CS
WCR
WMS0
—
—
0
1
0
1
—
—
0
1
0
1
0
is enabled or disabled in the data direction register
Bus
Width
16
16
16
16
16
16
8
8
8
8
8
8
3
Access
States
2
3
3
3
3
3
2
3
3
3
3
3
to CS
Bus Specifications
3
to CS
0
, the corresponding DDR bits
Wait Mode
Disabled
Pin wait mode 0
Programmable wait mode
Disabled
Pin wait mode 1
Pin auto-wait mode
Disabled
Pin wait mode 0
Programmable wait mode
Disabled
Pin wait mode 1
Pin auto-wait mode
1
0
, the corresponding
in the output state and
7
to CS
n
signal (n = 0
0
) that goes