HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 368

• Manufacturer Part Number: HD64F3048VTF8
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048VTF8

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F3048VX8

Section 10 16-Bit Integrated Timer Unit (ITU)
Bits 6 and 5—Counter Clear 1/0 (CCLR1, CCLR0): These bits select how TCNT is cleared.
Notes: 1. TCNT is cleared by compare match when the general register functions as an output
Bits 4 and 3—Clock Edge 1/0 (CKEG1, CKEG0): These bits select external clock input edges
when an external clock source is used.
When channel 2 is set to phase counting mode, bits CKEG1 and CKEG0 in TCR2 are ignored.
Phase counting takes precedence.
Bits 2 to 0—Timer Prescaler 2 to 0 (TPSC2 to TPSC0): These bits select the counter clock
source.
Rev. 7.00 Sep 21, 2005 page 342 of 878
REJ09B0259-0700
Bit 6: CCLR1
0
1
Bit 4: CKEG1
0
1
Bit 2: TPSC2
0
1
2. Selected in TSNC.
compare register, and by input capture when the general register functions as an input
capture register.
Bit 5: CCLR0
0
1
0
1
Bit 3: CKEG0
0
1
—
Bit 1: TPSC1
0
1
0
1
Description
TCNT is not cleared
TCNT is cleared by GRA compare match or input
capture *
TCNT is cleared by GRB compare match or input
capture *
Synchronous clear: TCNT is cleared in synchronization
with other synchronized timers *
Description
Count rising edges
Count falling edges
Count both edges
Bit 0: TPSC0
0
1
0
1
0
1
0
1
1
1
Description
Internal clock:
Internal clock: /2
Internal clock: /4
Internal clock: /8
External clock A: TCLKA input
External clock B: TCLKB input
External clock C: TCLKC input
External clock D: TCLKD input
2
(Initial value)
(Initial value)
(Initial value)