HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 258

IC H8 MCU FLASH 128K 100-QFP

HD64F3048VTF8

Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048VTF8

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
Section 8 DMA Controller
8.4.6
In block transfer mode the A and B channels are combined. One block of a specified size is
transferred per request. A designated number of block transfers are executed. Addresses are
specified in MARA and MARB. The block area address can be either held fixed or cycled.
Table 8.10 indicates the register functions in block transfer mode.
Table 8.10 Register Functions in Block Transfer Mode
Register
Legend
MARA: Memory address register A
MARB: Memory address register B
ETCRA: Execute transfer count register A
ETCRB: Execute transfer count register B
The source and destination addresses are both 24-bit addresses. MARA specifies the source
address. MARB specifies the destination address. MARA and MARB can be independently
incremented, decremented, or held fixed as data is transferred. One of these registers operates as a
block area register: even if it is incremented or decremented, it is restored to its initial value at the
end of each block transfer. The TMS bit in DTCRB selects whether the block area is the source or
destination.
Rev. 7.00 Sep 21, 2005 page 232 of 878
REJ09B0259-0700
23
23
15
Block Transfer Mode
MARA
MARB
ETCRB
7
ETCRAH
7
ETCRAL
0
0
0
0
0
Function
Source address
register
Destination
address register
Block size
counter
Initial block size
Block transfer
counter
Initial Setting
Source address
Destination
address
Block size
Block size
Number of block
transfers
Operation
Incremented or
decremented once per
transfer, or held fixed
Incremented or
decremented once per
transfer, or held fixed
Decremented once per
transfer until H'00 is
reached, then reloaded
from ETCRAL
Held fixed
Decremented once per
block transfer until H'0000
is reached and the
transfer ends

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