HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 310

IC H8 MCU FLASH 128K 100-QFP

HD64F3048VTF8

Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048VTF8

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
Section 9 I/O Ports
9.9
9.9.1
Port 8 is a 5-bit input/output port that is also used for CS
to IRQ
In modes 1 to 6 (expanded modes), port 8 can provide CS
to IRQ
In mode 7 (single-chip mode), port 8 can provide IRQ
selection of pin functions in single-chip mode.
The IRQ
input or output. For details see section 5, Interrupt Controller.
Pins in port 8 can drive one TTL load and a 90-pF capacitive load. They can also drive a
darlington transistor pair.
Pins P8
Rev. 7.00 Sep 21, 2005 page 284 of 878
REJ09B0259-0700
0
0
2
input. Figure 9.8 shows the pin configuration of port 8.
input. See table 9.14 for the selection of pin functions in expanded modes.
3
to P8
Port 8
Overview
to IRQ
0
Port 8
have Schmitt-trigger inputs.
0
functions are selected by IER settings, regardless of whether the pin is used for
Port 8 pins
P8 /
P8 /
P8 /
P8 /
P8 /
Pin functions in mode 7
(single-chip mode)
P8 /(input/output)
P8 /(input/output)/
P8 /(input/output)/
P8 /(input/output)/
P8 /(input/output)/
Figure 9.8 Port 8 Pin Configuration
4
3
2
1
0
4
3
2
1
0
CS
CS
CS
CS
RFSH
0
1
2
3
/
/
/
IRQ
IRQ
IRQ
/
IRQ
3
2
1
0
IRQ
IRQ
IRQ
IRQ
Pin functions in modes 1 to 6
(expanded modes)
P8 (input)/
P8 (input)/
P8 (input)/
P8 (input)/
P8 (input/output)/
3
2
1
0
4
3
2
1
0
(input)
(input)
(input)
(input)
3
to IRQ
3
CS
CS
CS
CS
3
to CS
to CS
0
1
2
3
(output)
(output)/
(output)/
(output)/
0
0
RFSH
input. See table 9.15 for the
0
output, RFSH output, and IRQ
output, RFSH output, and IRQ
IRQ
IRQ
IRQ
(output)/
3
2
1
(input)
(input)
(input)
IRQ
0
(input)
3
3

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