HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 652

• Manufacturer Part Number: HD64F3048VTF8
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048VTF8

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F3048VX8

Section 19 Flash Memory (H8/3048F: Dual Power Supply (V
Hardware Protection: Suspends or disables the programming and erasing of flash memory, and
resets the flash memory control register (FLMCR) and erase block registers (EBR1 and EBR2).
The error-protect function permits the P and E bits to be set, but prevents transitions to program
mode and erase mode. Details of hardware protection are as follows.
Protection
Programing
voltage (V
protect
Reset and
standby
protect
Error protect
Notes: 1. Program-verify, erase-verify, and prewrite-verify modes.
Error Protect: This protection mode is entered if one of the error conditions that set the FLER bit
in RAMCR is detected while flash memory is being programmed or erased (while the P bit or E
bit is set in FLMCR). These conditions can occur if microcontroller operations do not follow the
programming or erasing algorithm. Error protect is a flash-memory state. It does not affect other
microcontroller operations.
In this state the settings of the flash memory control register (FLMCR) and erase block registers
(EBR1 and EBR2) are preserved*, but program mode or erase mode is terminated as soon as the
error is detected. While the FLER bit is set, it is not possible to enter program mode or erase
Rev. 7.00 Sep 21, 2005 page 626 of 878
REJ09B0259-0700
2. All blocks are erase-disabled. It is not possible to specify individual blocks.
3. For details, see section 19.8, Flash Memory Programming and Erasing Precautions
PP
(Dual-Power Supply).
)
Description
When V
and EBR2 are initialized, disabling
programming and erasing. To obtain this
protection, V
When a reset occurs (including a
watchdog timer reset) or standby mode is
entered, FLMCR, EBR1, and EBR2 are
initialized, disabling programming and
erasing. Note that RES input does not
ensure a reset unless the RES pin is held
low for at least 20 ms at power-up (to
enable the oscillator to settle), or at least
10 system clock cycles ( ) during
operation.
If an operational error is detected during
programming or erasing of flash memory
(FLER = 1), the FLMCR, EBR1, and EBR2
settings are preserved, but programming
or erasing is aborted immediately. This
type of protection can be cleared only by a
reset or hardware standby.
PP
is not applied, FLMCR, EBR1,
PP
should not exceed V
CC
. *
3
Program
Disabled
Disabled
Disabled
PP
= 12 V))
Erase
Disabled *
Disabled *
Disabled *
Function
2
2
2
Verify *
Disabled
Disabled
Enabled
1