HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 312

IC H8 MCU FLASH 128K 100-QFP

HD64F3048VTF8

Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048VTF8

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
Section 9 I/O Ports
Mode 7 (Single-Chip Mode): Port 8 is a generic input/output port. A pin in port 8 becomes an
output port if the corresponding P8DDR bit is set to 1, and an input port if this bit is cleared to 0.
P8DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P8DDR is initialized to H'F0 in modes 1 to 4 and H'E0 in modes 5 to 7 by a reset and in hardware
standby mode. In software standby mode it retains its previous setting, so if a P8DDR bit is set to
1 while port 8 acts as an I/O port, the corresponding pin maintains its output state in software
standby mode.
Port 8 Data Register (P8DR)
P8DR is an 8-bit readable/writable register that stores output data for pins P8
acts as an output port, the value of this register is output. When a bit in P8DDR is set to 1, if port 8
is read the value of the corresponding P8DR bit is returned. When a bit in P8DDR is cleared to 0,
if port 8 is read the corresponding pin level is read.
Bits 7 to 5 are reserved. They cannot be modified and always are read as 1.
P8DR is initialized to H'E0 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Rev. 7.00 Sep 21, 2005 page 286 of 878
REJ09B0259-0700
Bit
Initial value
Read/Write
7
1
Reserved bits
6
1
5
1
R/W
P8
4
0
4
R/W
P8
3
0
Port 8 data 4 to 0
These bits store data
for port 8 pins
3
R/W
P8
2
0
2
4
to P8
R/W
P8
1
0
1
0
. While port 8
R/W
P8
0
0
0

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