HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 287

IC H8 MCU FLASH 128K 100-QFP

HD64F3048VTF8

Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048VTF8

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
9.2
9.2.1
Port 1 is an 8-bit input/output port with the pin configuration shown in figure 9.1. The pin
functions differ between the expanded modes with on-chip ROM disabled, expanded modes with
on-chip ROM enabled, and single-chip mode. In modes 1 to 4 (expanded modes with on-chip
ROM disabled), they are address bus output pins (A
In modes 5 and 6 (expanded modes with on-chip ROM enabled), settings in the port 1 data
direction register (P1DDR) can designate pins for address bus output (A
In mode 7 (single-chip mode), port 1 is a generic input/output port.
When DRAM is connected to area 3, A
cycles. For details see section 7, Refresh Controller.
Pins in port 1 can drive one TTL load and a 90-pF capacitive load. They can also drive a
darlington transistor pair.
Port 1
Port 1
Overview
Port 1 pins
P1 /A
P1 /A
P1 /A
P1 /A
P1 /A
P1 /A
P1 /A
P1 /A
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Figure 9.1 Port 1 Pin Configuration
Modes 1 to 4
A (output)
A (output)
A (output)
A (output)
A (output)
A (output)
A (output)
A (output)
7
6
5
4
3
2
1
0
7
to A
0
output row and column addresses in read and write
7
Modes 5 and 6
P1 (input)/A (output)
P1 (input)/A (output)
P1 (input)/A (output)
P1 (input)/A (output)
P1 (input)/A (output)
P1 (input)/A (output)
P1 (input)/A (output)
P1 (input)/A (output)
to A
7
6
5
4
3
2
1
0
Rev. 7.00 Sep 21, 2005 page 261 of 878
0
).
7
6
5
4
3
2
1
0
7
to A
0
Section 9 I/O Ports
) or generic input.
Mode 7
P1 (input/output)
P1 (input/output)
P1 (input/output)
P1 (input/output)
P1 (input/output)
P1 (input/output)
P1 (input/output)
P1 (input/output)
REJ09B0259-0700
7
6
5
4
3
2
1
0

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