HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 42

• Manufacturer Part Number: HD64F3048VTF8
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048VTF8

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F3048VX8

Section 1 Overview
Type
System control
Interrupts
Address bus
Data bus
Bus control
Rev. 7.00 Sep 21, 2005 page 16 of 878
REJ09B0259-0700
Symbol
RES
RESO
(RESO/V
STBY
BREQ
BACK
NMI
IRQ
IRQ
A
D
CS
AS
RD
HWR
LWR
WAIT
23
15
7
to A
to D
5
0
to CS
to
0
0
PP
0
)
Pin No.
63
10
62
59
60
64
17, 16,
90 to 87
97 to 100,
56 to 45,
43 to 36
34 to 23,
21 to 18
8, 97 to 99,
88 to 91
69
70
71
72
58
I/O
Input
Output
Input
Input
Output
Input
Input
Output
Input/
output
Output
Output
Output
Output
Output
Input
Reset input: When driven low, this pin
resets the chip
Reset output: For the mask ROM version,
outputs a reset signal to external devices
Also used as a power supply for on-board
programming of the flash memory version
with dual power supply.
Standby: When driven low, this pin forces a
transition to hardware standby mode
Bus request: Used by an external bus
master to request the bus right
Bus request acknowledge: Indicates that
the bus has been granted to an external bus
master
Nonmaskable interrupt: Requests a
nonmaskable interrupt
Interrupt request 5 to 0: Maskable
interrupt request pins
Address bus: Outputs address signals
Data bus: Bidirectional data bus
Chip select: Select signals for areas 7 to 0
Address strobe: Goes low to indicate valid
address output on the address bus
Read: Goes low to indicate reading from
the external address space
High write: Goes low to indicate writing to
the external address space; indicates valid
data on the upper data bus (D
Low write: Goes low to indicate writing to
the external address space; indicates valid
data on the lower data bus (D
Wait: Requests insertion of wait states in
bus cycles during access to the external
address space
Name and Function
7
15
to D
to D
0
).
8
).