HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 30

IC H8 MCU FLASH 128K 100-QFP

HD64F3048VTF8

Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048VTF8

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
Section 1 Overview
Feature
DMA controller
(DMAC)
16-bit integrated
timer unit (ITU)
Programmable
timing pattern
controller (TPC)
Watchdog timer
(WDT),
1 channel
Rev. 7.00 Sep 21, 2005 page 4 of 878
REJ09B0259-0700
Description
Short address mode
Full address mode
Five 16-bit timer channels, capable of processing up to 12 pulse outputs or
10 pulse inputs
16-bit timer counter (channels 0 to 4)
Two multiplexed output compare/input capture pins (channels 0 to 4)
Operation can be synchronized (channels 0 to 4)
PWM mode available (channels 0 to 4)
Phase counting mode available (channel 2)
Buffering available (channels 3 and 4)
Reset-synchronized PWM mode available (channels 3 and 4)
Complementary PWM mode available (channels 3 and 4)
DMAC can be activated by compare match/input capture A interrupts
(channels 0 to 3)
Maximum 16-bit pulse output, using ITU as time base
Up to four 4-bit pulse output groups (or one 16-bit group, or two 8-bit groups)
Non-overlap mode available
Output data can be transferred by DMAC
Reset signal can be generated by overflow
Reset signal can be output externally
Usable as an interval timer
Maximum four channels available
Selection of I/O mode, idle mode, or repeat mode
Can be activated by compare match/input capture A interrupts from ITU
channels 0 to 3, transmit-data-empty and receive-data-full interrupts from
SCI channel 0, or external requests
Maximum two channels available
Selection of normal mode or block transfer mode
Can be activated by compare match/input capture A interrupts from ITU
channels 0 to 3, external requests, or auto-request

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