HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 492

IC H8 MCU FLASH 128K 100-QFP

HD64F3048VTF8

Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048VTF8

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
Section 13 Serial Communication Interface
Bit 5—Overrun Error (ORER): Indicates that data reception ended abnormally due to an
overrun error.
Notes: 1. Clearing the RE bit to 0 in SCR does not affect the ORER flag, which retains its
Bit 4—Framing Error (FER): Indicates that data reception ended abnormally due to a framing
error in asynchronous mode.
Notes: 1. Clearing the RE bit to 0 in SCR does not affect the FER flag, which retains its previous
Rev. 7.00 Sep 21, 2005 page 466 of 878
REJ09B0259-0700
Bit 5: ORER
0
1
Bit 4: FER
0
1
2. RDR continues to hold the receive data before the overrun error, so subsequent receive
2. When the stop bit length is 2 bits, only the first bit is checked. The second stop bit is not
previous value.
data is lost. Serial receiving cannot continue while the ORER flag is set to 1. In
synchronous mode, serial transmitting is also disabled.
value.
checked. When a framing error occurs the SCI transfers the receive data into RDR but
does not set the RDRF flag. Serial receiving cannot continue while the FER flag is set
to 1. In synchronous mode, serial transmitting is also disabled.
Description
Receiving is in progress or has ended normally
[Clearing conditions]
The chip is reset or enters standby mode.
Software reads ORER while it is set to 1, then writes 0.
A receive overrun error occurred *
[Setting condition]
Reception of the next serial data ends when RDRF = 1.
Description
Receiving is in progress or has ended normally
[Clearing conditions]
The chip is reset or enters standby mode.
Software reads FER while it is set to 1, then writes 0.
A receive framing error occurred *
[Setting condition]
The stop bit at the end of receive data is checked and found to be 0.
2
2
(Initial value) *
(Initial value) *
1
1

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