XC3S200-4TQG144I Xilinx Inc, XC3S200-4TQG144I Datasheet - Page 119

FPGA Spartan®-3 Family 200K Gates 4320 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP

XC3S200-4TQG144I

Manufacturer Part Number
XC3S200-4TQG144I
Description
FPGA Spartan®-3 Family 200K Gates 4320 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet

Specifications of XC3S200-4TQG144I

Package
144TQFP
Family Name
Spartan®-3
Device Logic Units
4320
Device System Gates
200000
Maximum Internal Frequency
630 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
97
Ram Bits
221184
Package / Case
144-TQFP, 144-VQFP
Mounting Type
Surface Mount
Voltage - Supply
1.14 V ~ 3.465 V
Operating Temperature
-40°C ~ 100°C
Number Of I /o
97
Number Of Logic Elements/cells
*
Number Of Gates
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Package Overview
Table 80
package styles for the Spartan-3 family. Each package style
is available as a standard and an environmentally-friendly
lead-free (Pb-free) option. The Pb-free packages include an
extra ‘G’ in the package style name. For example, the stan-
dard "VQ100" package becomes "VQG100" when ordered
Table 80: Spartan-3 Family Package Options
Selecting the Right Package Option
Spartan-3 FPGAs are available in both quad-flat pack
(QFP) and ball grid array (BGA) packaging options. While
QFP packaging offers the lowest absolute cost, the BGA
Table 81: Comparing Spartan-3 Packaging Options
DS099-4 (v2.5) December 4, 2009
Product Specification
Notes:
1.
FG1156 / FGG1156
Maximum User I/O
Packing Density (Logic/Area)
Signal Integrity
Simultaneous Switching Output (SSO) Support
Thermal Dissipation
Minimum Printed Circuit Board (PCB) Layers
Hand Assembly/Rework
CP132 / CPG132
VQ100 / VQG100
PQ208 / PQG208
TQ144 / TQG144
FG320 / FGG320
FG456 / FGG456
FG676 / FGG676
FG900 / FGG900
FT256 / FTG256
The CP132, CPG132, FG1156, and FGG1156 packages are being discontinued and are not recommended for new designs. See
http://www.xilinx.com/support/documentation/spartan-3_customer_notices.htm
Package
shows the 10 low-cost, space-saving production
R
Characteristic
(1)
(1)
Leads
1156
100
132
144
208
256
320
456
676
900
Very-thin Quad Flat Pack
Chip-Scale Package
Thin Quad Flat Pack
Quad Flat Pack
Fine-pitch, Thin Ball Grid Array
Fine-pitch Ball Grid Array
Fine-pitch Ball Grid Array
Fine-pitch Ball Grid Array
Fine-pitch Ball Grid Array
Fine-pitch Ball Grid Array
Type
www.xilinx.com
Quad Flat-Pack (QFP)
as the Pb-free option. The mechanical dimensions of the
standard and Pb-free packages are similar, as shown in the
mechanical drawings provided in
Not all Spartan-3 densities are available in all packages.
However, for a specific package there is a common footprint
for that supports the various devices available in that pack-
age. See the footprint diagrams that follow.
packages are superior in almost every other aspect, as
summarized in
using BGA packaging whenever possible.
Possible
Limited
Good
Fair
Fair
141
4
Maximum
Spartan-3 FPGA Family: Pinout Descriptions
141
173
221
333
489
633
784
I/O
63
89
97
Table
for the latest updates.
81. Consequently, Xilinx recommends
Pitch
(mm)
0.5
0.5
0.5
0.5
1.0
1.0
1.0
1.0
1.0
1.0
Ball Grid Array (BGA)
Table
30.6 x 30.6
Footprint
Very Difficult
16 x 16
22 x 22
17 x 17
19 x 19
23 x 23
27 x 27
31 x 31
35 x 35
(mm)
8 x 8
Better
Better
Better
Better
82.
633
6
Height
(mm)
1.20
1.10
1.60
4.10
1.55
2.00
2.60
2.60
2.60
2.60
119

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