XC3S200-4TQG144I Xilinx Inc, XC3S200-4TQG144I Datasheet - Page 30

• Manufacturer Part Number: XC3S200-4TQG144I
• Description: FPGA Spartan®-3 Family 200K Gates 4320 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3r

Specifications of XC3S200-4TQG144I

• Package: 144TQFP
• Family Name: Spartan®-3
• Device Logic Units: 4320
• Device System Gates: 200000
• Maximum Internal Frequency: 630 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 97
• Ram Bits: 221184
• Package / Case: 144-TQFP, 144-VQFP
• Mounting Type: Surface Mount
• Voltage - Supply: 1.14 V ~ 3.465 V
• Operating Temperature: -40°C ~ 100°C
• Number Of I /o: 97
• Number Of Logic Elements/cells: *
• Number Of Gates: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Spartan-3 FPGA Family: Functional Description
Dedicated Multipliers
All Spartan-3 devices provide embedded multipliers that
accept two 18-bit words as inputs to produce a 36-bit prod-
uct. This section provides an introduction to multipliers. For
further details, refer to the “Using Embedded Multipliers”
chapter in UG331.
The input buses to the multiplier accept data in two’s-com-
plement form (either 18-bit signed or 17-bit unsigned). One
such multiplier is matched to each block RAM on the die.
The close physical proximity of the two ensures efficient
30
54
A[17:0]
B[17:0]
Figure 15: Waveforms of Block RAM Data Operations with NO_CHANGE Selected
(a) Asynchronous 18-bit Multiplier
ADDR
CLK
WE
DO
EN
DI
DISABLED
MULT18X18
0000
Figure 16: Embedded Multiplier Primitives
XXXX
aa
READ
P[35:0]
MEM(aa)
www.xilinx.com
1111
bb
MEM(bb)=1111
WRITE
data handling. Cascading multipliers permits multiplicands
more than three in number as well as wider than 18-bits.
The multiplier is placed in a design using one of two primi-
tives: an asynchronous version called MULT18X18 and a
version with a register called MULT18X18S, as shown in
Figure 16a
these primitives are defined in
The CORE Generator system produces multipliers based
on these primitives that can be configured to suit a wide
range of requirements.
A[17:0]
B[17:0]
RST
CLK
(b) 18-bit Multiplier with Register
CE
2222
cc
MEM(cc)=2222
WRITE
and
Figure
MULT18X18S
16b, respectively. The signals for
dd
DS099-2_16_030403
XXXX
READ
DS099-2 (v2.5) December 4, 2009
MEM(dd)
Table
P[35:0]
DS099-2_17_052705
14.
Product Specification
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