XC3S200-4TQG144I Xilinx Inc, XC3S200-4TQG144I Datasheet - Page 44

• Manufacturer Part Number: XC3S200-4TQG144I
• Description: FPGA Spartan®-3 Family 200K Gates 4320 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3r

Specifications of XC3S200-4TQG144I

• Package: 144TQFP
• Family Name: Spartan®-3
• Device Logic Units: 4320
• Device System Gates: 200000
• Maximum Internal Frequency: 630 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 97
• Ram Bits: 221184
• Package / Case: 144-TQFP, 144-VQFP
• Mounting Type: Surface Mount
• Voltage - Supply: 1.14 V ~ 3.465 V
• Operating Temperature: -40°C ~ 100°C
• Number Of I /o: 97
• Number Of Logic Elements/cells: *
• Number Of Gates: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Spartan-3 FPGA Family: Functional Description
Interconnect
Interconnect (or routing) passes signals among the various
functional elements of Spartan-3 devices. There are four
kinds of interconnect: Long lines, Hex lines, Double lines,
and Direct lines.
Long lines connect to one out of every six CLBs (see
Figure
are well-suited for carrying high-frequency signals with min-
imal loading effects (e.g. skew). If all eight Global Clock
Inputs are already committed and there remain additional
clock signals to be assigned, Long lines serve as a good
alternative.
Hex lines connect one out of every three CLBs (see
Figure
44
54
23a). Because of their low capacitance, these lines
23b). These lines fall between Long lines and Dou-
CLB
CLB
CLB
(c) Double Line
6
CLB
CLB
CLB
2
CLB
8
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CLB
Figure 23: Types of Interconnect
CLB
CLB
www.xilinx.com
CLB
(a) Long Line
(b) Hex Line
CLB
6
ble lines in terms of capability: Hex lines approach the
high-frequency characteristics of Long lines at the same
time, offering greater connectivity.
Double lines connect to every other CLB (see
Compared to the types of lines already discussed, Double
lines provide a higher degree of flexibility when making con-
nections.
Direct lines afford any CLB direct access to neighboring
CLBs (see
conduct a signal from a "source" CLB to a Double, Hex, or
Long line and then from the longer interconnect back to a
Direct line accessing a "destination" CLB.
For more details, refer to the “Using Interconnect” chapter in
UG331.
CLB
Figure
CLB
CLB
CLB
CLB
CLB
6
23d). These lines are most often used to
CLB
(d) Direct Lines
CLB
CLB
CLB
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CLB
CLB
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Product Specification
CLB
CLB
CLB
CLB
DS099-2_20_040103
CLB
Figure
23c).
R