XC3S200-4TQG144I Xilinx Inc, XC3S200-4TQG144I Datasheet - Page 51

FPGA Spartan®-3 Family 200K Gates 4320 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP

XC3S200-4TQG144I

Manufacturer Part Number
XC3S200-4TQG144I
Description
FPGA Spartan®-3 Family 200K Gates 4320 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet

Specifications of XC3S200-4TQG144I

Package
144TQFP
Family Name
Spartan®-3
Device Logic Units
4320
Device System Gates
200000
Maximum Internal Frequency
630 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
97
Ram Bits
221184
Package / Case
144-TQFP, 144-VQFP
Mounting Type
Surface Mount
Voltage - Supply
1.14 V ~ 3.465 V
Operating Temperature
-40°C ~ 100°C
Number Of I /o
97
Number Of Logic Elements/cells
*
Number Of Gates
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
DS099-2 (v2.5) December 4, 2009
Product Specification
R
Figure 28: Boundary-Scan Configuration Flow Diagram
No
No
and V
(JTAG port becomes
Load configuration
and V
INIT_B = High?
(Clock five 1's
Load JSTART
Load CFG_IN
Reconfigure?
Synchronous
configuration
data frames
User mode
V
instruction
Power-On
Yes
instruction
TAP reset
sequence
CCO
mode pins
Yes
Yes
available)
on TMS)
Start-Up
correct?
CCINT
memory
Sample
CCAUX
Clear
CRC
Bank 4 > 1V
>1V
> 2V
Yes
No
www.xilinx.com
No
INIT_B goes Low.
Abort Start-Up
Shutdown
sequence
Yes
Set PROG_B Low
after Power-On
PROG_B = Low
Spartan-3 FPGA Family: Functional Description
No
JShutdown
instruction
Load
DS099_27_041103
51

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