XC3S200-4TQG144I Xilinx Inc, XC3S200-4TQG144I Datasheet - Page 138

• Manufacturer Part Number: XC3S200-4TQG144I
• Description: FPGA Spartan®-3 Family 200K Gates 4320 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3r

Specifications of XC3S200-4TQG144I

• Package: 144TQFP
• Family Name: Spartan®-3
• Device Logic Units: 4320
• Device System Gates: 200000
• Maximum Internal Frequency: 630 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 97
• Ram Bits: 221184
• Package / Case: 144-TQFP, 144-VQFP
• Mounting Type: Surface Mount
• Voltage - Supply: 1.14 V ~ 3.465 V
• Operating Temperature: -40°C ~ 100°C
• Number Of I /o: 97
• Number Of Logic Elements/cells: *
• Number Of Gates: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Spartan-3 FPGA Family: Pinout Descriptions
Table 92: PQ208 Package Pinout (Continued)
Table 93: User I/Os Per Bank for XC3S50 in PQ208 Package
138
VCCAUX CCLK
VCCAUX DONE
Package Edge
Bank
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Bottom
Right
Left
Top
GND
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCINT
VCCINT
VCCINT
VCCINT
Pin Name
XC3S50
I/O Bank
GND
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCINT
VCCINT
VCCINT
VCCINT
CCLK
DONE
0
1
2
3
4
5
6
7
Pin Name
XC3S200
XC3S400
Maximum
I/O
15
15
16
16
15
15
16
16
Number
PQ208
P193
P173
P142
P121
P192
P174
P104
P103
P25
P89
P69
P38
P17
P88
P70
Pin
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
CONFIG
CONFIG
VCCINT
VCCINT
VCCINT
VCCINT
Type
GND
I/O
13
12
12
12
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9
9
3
3
Table 92: PQ208 Package Pinout (Continued)
User I/Os by Bank
Table 93
tributed between the eight I/O banks for the XC3S50 in the
PQ208 package. Similarly,
able user-I/O pins are distributed between the eight I/O
banks for the XC3S200 and XC3S400 in the PQ208 pack-
age.
VCCAUX HSWAP_EN
VCCAUX M0
VCCAUX M1
VCCAUX M2
VCCAUX PROG_B
VCCAUX TCK
VCCAUX TDI
VCCAUX TDO
VCCAUX TMS
DUAL
Bank
0
0
0
0
6
6
0
0
All Possible I/O Pins by Type
indicates how the available user-I/O pins are dis-
Pin Name
XC3S50
DCI
2
2
2
2
2
2
2
2
HSWAP_EN
M0
M1
M2
PROG_B
TCK
TDI
TDO
TMS
Pin Name
XC3S200
XC3S400
Table 94
DS099-4 (v2.5) December 4, 2009
VREF
2
2
2
2
2
2
2
2
shows how the avail-
Product Specification
Number
PQ208
P206
P207
P159
P208
P158
P160
P55
P54
P56
Pin
GCLK
CONFIG
CONFIG
CONFIG
CONFIG
CONFIG
2
2
0
0
2
2
0
0
JTAG
JTAG
JTAG
JTAG
Type
R