XC3S200-4TQG144I Xilinx Inc, XC3S200-4TQG144I Datasheet - Page 67

• Manufacturer Part Number: XC3S200-4TQG144I
• Description: FPGA Spartan®-3 Family 200K Gates 4320 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3r

Specifications of XC3S200-4TQG144I

• Package: 144TQFP
• Family Name: Spartan®-3
• Device Logic Units: 4320
• Device System Gates: 200000
• Maximum Internal Frequency: 630 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 97
• Ram Bits: 221184
• Package / Case: 144-TQFP, 144-VQFP
• Mounting Type: Surface Mount
• Voltage - Supply: 1.14 V ~ 3.465 V
• Operating Temperature: -40°C ~ 100°C
• Number Of I /o: 97
• Number Of Logic Elements/cells: *
• Number Of Gates: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I/O Timing
Table 39: Pin-to-Pin Clock-to-Output Times for the IOB Output Path
DS099-3 (v2.5) December 4, 2009
Product Specification
98
Notes:
1.
2.
3.
4.
Clock-to-Output Times
T
Symbol
ICKOFDCM
The numbers in this table are tested using the methodology presented in
forth in
This clock-to-output time requires adjustment whenever a signal standard other than LVCMOS25 is assigned to the Global Clock
Input or a standard other than LVCMOS25 with 12 mA drive and Fast slew rate is assigned to the data Output. If the former is true,
add the appropriate Input adjustment from
DCM output jitter is included in all measurements.
For minimums, use the values reported by the Xilinx timing analyzer.
T
ICKOF
Table 31
R
When reading from the Output
Flip-Flop (OFF), the time from the
active transition on the Global
Clock pin to data appearing at the
Output pin. The DCM is in use.
When reading from OFF, the time
from the active transition on the
Global Clock pin to data appearing
at the Output pin. The DCM is not
in use.
and
Table
34.
Description
Table
Spartan-3 FPGA Family: DC and Switching Characteristics
43. If the latter is true, add the appropriate Output adjustment from
www.xilinx.com
LVCMOS25
output drive, Fast slew
rate, with DCM
LVCMOS25
output drive, Fast slew
rate, without DCM
Conditions
(2)
(2)
, 12mA
, 12mA
(3)
Table 47
and are based on the operating conditions set
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
Device
Speed Grade
Max
2.04
1.45
1.45
2.07
2.05
2.03
1.94
2.00
3.70
3.89
3.91
4.00
4.07
4.19
4.44
4.38
-5
Max
2.35
1.75
1.75
2.39
2.36
2.34
2.24
2.30
4.24
4.46
4.48
4.59
4.66
4.80
5.09
5.02
-4
Table
46.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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