AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 132

• Manufacturer Part Number: AMD-8132BLCT
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-8132BLCT

• Lead Free Status / RoHS Status: Not Compliant

AMD-8132™ HyperTransport™ PCI-X
RDR. Default: 0000 0000 0001 0000h. The redirection registers are defined as follows:
132
APIC[B,A]:
00[7:0]
00h
01h
02h
10h-1Dh
1Eh-FFh
Bits
63:56
55:17
16
Description
Destination [DEST]. Read-Write. IntrInfo[15:8] in the HyperTransport™ link interrupt request packet.
Reserved.
Interrupt Mask [IM]. Read-Write.
1 = Interrupt is masked.
Note: The state of this bit is also used for the NIOAIRQ[D:A]_L pins; see Dev[B,A]:0x40[NIOAMODE].
• In physical mode, bits[59:56] specify the APIC ID of the target processor.
• In logical mode, bits[63:56] specify a set of processors.
• When the interrupt is specified to be in edge-sensitive mode and this bit transitions from 1 to 0,
• When the interrupt is specified to be in level-sensitive mode and the interrupt line is in the asserted
then no interrupt request is generated regardless of the state of the interrupt line.
state, then when this bit transitions from 1 to 0 an interrupt request is generated.
Description
APIC ID Register. Bits[31:24] are Read-Write; they control no hardware. All other
bits are reserved.
IOAPIC Version Register.
Bits[31:24] are reserved.
Bits[23:16] Maximum Redirection Entry are Read Only. This field contains the entry
Bits [15:8] are reserved.
Bits [7:0] APIC Version are Read Only. The version number assigned to this
IOAPIC Arbitration ID Register. Bits[31:24] are Read-Write; they control no
hardware. All other bits are reserved.
RDR. Redirection Registers. Each of the 7 redirection registers utilizes two
indexes. Bits[63:32] are accessed through the odd indexes. Bits[31:0] are
accessed through the even indexes. They are mapped to the interrupts as follows:
Reserved.
Pin
[B,A]_PIRQA_L
[B,A]_PIRQB_L
[B,A]_PIRQC_L
[B,A]_PIRQD_L
[B,A]_Fatal
[B,A]_Nonfatal
[B,A]_SHPC_INTR 1Ch
number (0 being the lowest) of the highest entry in the I/O redirection table. The
value is equal to one less than the number of redirection entries. This IOAPIC
has 7 entries, so this value is 6h.
IOAPIC is 11h.
IO[B,A]00 for Bits[31:0]
10h
12h
14h
16h
18h
1Ah
®
2.0 Tunnel Data Sheet
Registers
IO[B,A]00 for Bits[63:32]
11h
13h
15h
17h
19h
1Bh
1Dh
26792 Rev. 3.07 July 2005
Default
0000 0000h
0006 0011h
0000 0000h
Bits[63:32] =
0000 0000h
Bits[31:0] =
0001 0000h
Chapter 3