AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 42

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AMD-8132BLCT

Manufacturer Part Number
AMD-8132BLCT
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AMD-8132BLCT

Lead Free Status / RoHS Status
Not Compliant
®
AMD-8132™ HyperTransport™ PCI-X
2.0 Tunnel Data Sheet
26792 Rev. 3.07 July 2005
®
1.3.8
PCI-X
2.0 PHY Compensation Update
The PCI-X Electrical and Mechanical Addendum to the PCI Local Bus Specification, Rev 2.0a requires tightly
controlled on-die termination, output impedance matching, and slew rate control. The PCI-X PHY used in the
AMD-8132 tunnel maintains tight control of these parameters regardless of temperature, voltage, or process
variation. The PCI-X PHY accomplishes this control using compensation circuitry. Each PCI bus has a ball
connected to an external calibration resistor. By default, the PHY periodically samples calibration values and
updates the input and output parameters. The compensation circuit requires an accurate (1%) pulldown resistor
connected to ground. This resistor should be two times the board impedance
The PCI-X PHY calculated compensation values can change at any time. Compensation results driven to the
pads change in increments of no more than 1; this means the electrical noise introduced by an update is
sufficiently low that updates can occur even while the bus is active. The compensation circuitry runs
continuously in PCI-X Mode 2 and continues to run through a warm reset.
42
Functional Operation
Chapter 1

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