AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 19
AMD-8132BLCT
Manufacturer Part Number
AMD-8132BLCT
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-8132BLCT.pdf
(196 pages)
Specifications of AMD-8132BLCT
Lead Free Status / RoHS Status
Not Compliant
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26792 Rev. 3.07 July 2005
Figure 2 shows buffers in the AMD-8132 tunnel.
Figure 2. Link Buffer Diagram
1.2
1.2.1
Each HyperTransport link supports transmit clock frequencies of 200, 400, 500, 600, 800, and 1000 MHz.
Side 0 and side 1 frequencies are independent of each other. The links can operate in asynchronous mode, as
defined in HyperTransport™ I/O Link Specification, Rev 2.0 up to a maximum of 1000 MHz receive clock
rate. On cold reset, each link begins transmitting at 200 MHz and then can be reprogrammed for higher clock
rates per HyperTransport™I/O Link Specification, Rev 2.0.
Chapter 1
• TX PHY - HyperTransport link transmit physical layer.
PW: Posted Write
NP:
RSP: Response
Cmd: Command
Data: Data buffers. All
Receive Path
Link 0 Transmit
Tunnel Links
Link Frequency
LR0 CFF,
buffers.
Nonposted
buffers.
buffers.
buffers.
data buffers are
64 bytes unless
otherwise noted.
LT0
RSP
PW
NP
stream
Cmd Data
Down-
8
8
8
RSP 27
8
2
8
PW
NP
Functional Operation
Cmd Data
4-deep NP
Command
4
4
AMD-8132™ HyperTransport™ PCI-X
FIFO
PCI-X
27
4
1
Interface
8-deep NP
Command
RSP
PW
NP
buffer
Cmd Data
12
4
4
4 DW
12
RSP
PW
4
NP
stream
Cmd Data
Up-
8
8
8
8
2
8
Link 1 Transmit
LCLK
PCLK
Times 2
Bridges
PCI-X
®
for two
Receive Path
2.0 Tunnel Data Sheet
LR1 CFF,
LT1
19
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