AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 161

• Manufacturer Part Number: AMD-8132BLCT
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-8132BLCT

• Lead Free Status / RoHS Status: Not Compliant

26792 Rev. 3.07 July 2005
Chapter 6
Test modes and their encodings for the AMD-8132™ HyperTransport™ PCI-X
Table 11.
Table 11.
6.1
In power-down mode, all outputs of the AMD-8132 tunnel are placed in their high-impedance state. All input
receivers are turned off. All analog circuitry (such as PLLs and phase interpolaters) is turned off.
Note: There is also a JTAG command that allows all outputs to be placed in their high impedance state, but
6.2
The AMD-8132 tunnel supports JTAG using a standard JTAG port. While in JTAG mode, TEST and
STRAPL[1:0] must be low. The PCI-X category 1 signals always have PCI-X Mode 1 electrical characteristics
and the VIO voltage level supplied to the AMD-8132 tunnel must be 3.3 volts.
JTAG is controlled by the standard JTAG signals as defined in IEEE 1149.1. TCK is the clock, TRST_L is the
reset, TMS is the mode select, TDI is the data input, and TDO is the data output.
There are 5 instructions supported by the AMD-8132 tunnel:
1. BYPASS. Default mode entered any time TRST_L is asserted. In this mode the TDI input is passed to the
2. IDCODE. Read the device ID code associated with the AMD-8132 tunnel.
3. HIGHZ. Other than TDO, all outputs of the AMD-8132 tunnel are in the high-impedance state.
4. SAMPLE/PRELOAD. Allows the state of all inputs to the AMD-8132 tunnel to be sampled in the
5. EXTEST. Drives the outputs of the AMD-8132 tunnel with the values that had previously been scanned
Chapter 6
Mode
Functional
Power-Down Mode
TDO output with a one-cycle register delay. This allows multiple components to be daisy chained on one
JTAG chain.
boundary-scan register cells and then read by scanning out the JTAG boundary-scan chain. This mode also
allows new values to be scanned into the boundary scan chain for subsequent use by the EXTEST
instruction.
into the boundary scan registers (using the SAMPLE/PRELOAD instruction).
which does not turn off input receivers and analog logic.
Power-Down Mode
JTAG
TMODE[2:0] Encodings
Test
0
1
Test
NIOAIRQD_L A_PIRQC_L
x
0
AMD-8132™ HyperTransport™ PCI-X
Test
x
0
TMODE[2:0]
A_REQ_L0
x
0
®
2.0 tunnel are given in
®
2.0 Tunnel Data Sheet
161